AMD A8-4500M vs Intel Xeon 5130
Physical Specifications
| Socket | AMD Socket FS1r2 | Intel Socket 771 |
|---|---|---|
| Process size | 32 nm | 65 nm |
| Transistors | 1,178 million | unknown |
| Die size | 246 mm² | unknown |
| Package | µPGA | FC-LGA6 |
| Foundry | — | Intel |
Performance
| Frequency | 1900 MHz | 2000 MHz |
|---|---|---|
| Turbo clock | up to 2.8 GHz | — |
| Base clock | 100 MHz | 333 MHz |
| Multiplier | 19.0x | 6.0x |
| Multiplier unlocked | No | No |
| Voltage | 1.3 V | — |
| TDP | 35 W | 65 W |
Architecture Details
| Vertical Segment | Mobile | Server/Workstation |
|---|---|---|
| Production status | unknown | End-of-life |
| Release date | May 15th, 2012 | Jun 26th, 2006 |
| Codename | Trinity | Woodcrest |
| Generation | A8 | Xeon |
| Part | AM4500DEC44HJ | unknown |
| Memory support | unknown | DDR2 |
| ECC memory | No | Yes |
Cores
| Total Cores | 4 | 2 |
|---|---|---|
| Total Threads | 4 | 2 |
| SMP # CPUs | 1 | 1 |
| Integrated graphics | Radeon HD 7640G | — |
Cache
| Cache L1 | 192K | — |
|---|---|---|
| Cache L2 | 4MB (shared) | 4MB |
Notes
| Notes | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 497MHz integrated graphics base core frequency, 655MHz maximum dynamic core frequency | — |
|---|
Features & Technologies
| AES | Yes | — |
|---|---|---|
| AMD-V | Yes | — |
| AMD64 | Yes | — |
| AVX | Yes | — |
| CLMUL | Yes | — |
| CVT16 | Yes | — |
| EVP | Yes | — |
| F16C | Yes | — |
| FMA3 | Yes | — |
| FMA4 | Yes | — |
| Intel 64 | — | Yes |
| MMX | Yes | Yes |
| SSE | Yes | Yes |
| SSE2 | Yes | Yes |
| SSE3 | Yes | Yes |
| SSE4 | — | Yes |
| SSE4.1 | Yes | — |
| SSE4.2 | Yes | — |
| SSE4A | Yes | — |
| SSSE3 | Yes | — |
| Turbo Core | Yes | — |
| VT | — | Yes |
| XD bit | — | Yes |
| XOP | Yes | — |
