插座 | AMD Socket G34 | Intel BGA 1449 |
---|---|---|
工艺尺寸 | 32 nm | 10 nm |
晶体管 | 2,400 million | unknown |
模具尺寸 | 316 mm² | unknown |
包 | — | FC-BGA1449 |
铸造厂 | — | Intel |
tCaseMax | — | 72°C |
tJMax | — | 100°C |
频率 | 2.3 GHz | 2.9 GHz |
---|---|---|
涡轮时钟 | up to 3.2 GHz | up to 5 GHz |
基本时钟 | 200 MHz | 100 MHz |
乘数 | 11.5x | 29.0x |
乘数解锁 | No | No |
TDP | 115 W | 28 W |
市场 | Server/Workstation | Mobile |
---|---|---|
生产状况 | End-of-life | Active |
发布日期 | Nov 14th, 2011 | May 31st, 2021 |
代码名称 | Interlagos | Tiger Lake-U |
代 | Opteron | Core i7 |
部分 | OS6276WKTGGGU | unknown |
内存支持 | DDR3 | DDR4-4266 MHz Dual-channel |
ECC内存 | No | No |
PCI Express | Gen 2 | Gen 4, 16 Lanes(CPU only) |
核心数 | 16 | 4 |
---|---|---|
线程数 | 16 | 8 |
SMP # CPU | 4 | 1 |
集成显卡 | — | Iris Xe Graphics G7 96EU |
缓存 L1 | 768K | 96K (per core) |
---|---|---|
缓存 L2 | 16MB | 1.25MB (per core) |
缓存 L3 | 8MB (per die) | 12MB (shared) |
笔记 | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
AVX-512 | — | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
Boost 2.0 | — | Yes |
CLMUL | Yes | Yes |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
F16C | — | Yes |
FMA3 | — | Yes |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TSX | — | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |