插座 | AMD Socket AM3+ | AMD Socket FP5 |
---|---|---|
工艺尺寸 | 32 nm | 12 nm |
晶体管 | 1,200 million | 4,940 million |
模具尺寸 | 315 mm² | 210 mm² |
包 | µPGA | FP5 |
铸造厂 | — | GlobalFoundries |
tJMax | — | 105°C |
频率 | 3.2 GHz | 2.1 GHz |
---|---|---|
涡轮时钟 | up to 4 GHz | up to 3.7 GHz |
基本时钟 | 200 MHz | 100 MHz |
乘数 | 16.0x | 21.0x |
乘数解锁 | Yes | No |
电压 | 1.425 V | — |
TDP | 95 W | 15 W |
市场 | Desktop | Mobile |
---|---|---|
生产状况 | Active | Active |
发布日期 | Sep 2nd, 2014 | Jan 6th, 2019 |
代码名称 | Vishera | Picasso |
代 | FX | Ryzen 5 |
部分 | FD832EWMW8KHKFD832EWMHKBOX | YM3500C4T4MFG |
内存支持 | DDR3 Dual-channel | DDR4 Dual-channel |
ECC内存 | No | No |
PCI Express | Gen 2 | Gen 3 |
核心数 | 8 | 4 |
---|---|---|
线程数 | 8 | 8 |
SMP # CPU | 1 | 1 |
集成显卡 | — | Radeon Vega 8 |
缓存 L1 | 384K | 96K (per core) |
---|---|---|
缓存 L2 | 8MB | 512K (per core) |
缓存 L3 | 8MB (shared) | 4MB (shared) |
笔记 | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped | — |
---|
AES | Yes | Yes |
---|---|---|
AMD-V | Yes | Yes |
AMD64 | Yes | Yes |
AVX | Yes | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EVP | Yes | Yes |
F16C | — | Yes |
FMA3 | — | Yes |
FMA4 | Yes | — |
HT3.1 | Yes | — |
MMX | Yes | Yes |
Precision Boost | — | Yes |
SHA | — | Yes |
SMAP | — | Yes |
SMEP | — | Yes |
SMT | — | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | Yes |
SSE4.2 | Yes | Yes |
SSE4A | Yes | Yes |
SSSE3 | Yes | Yes |
Turbo Core | Yes | — |
XOP | Yes | — |