Socket | AMD Socket G34 | Intel Socket 2011 |
---|---|---|
Rozmiar procesu | 32 nm | 32 nm |
Tranzystory | 2,400 million | 1,270 million |
Rozmiar matrycy | 316 mm² | 294 mm² |
Pakiet | — | FC-LGA10 |
Producent | — | Intel |
Częstotliwość | 2.3 GHz | 3.3 GHz |
---|---|---|
Zegar turbo | up to 3.2 GHz | up to 3.5 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 11.5x | 33.0x |
Mnożnik odblokowany | No | No |
TDP | 115 W | 130 W |
Napięcie | — | 1.35 V |
Rynek | Server/Workstation | Server/Workstation |
---|---|---|
Status produkcji | End-of-life | unknown |
Data wydania | Nov 14th, 2011 | Mar 6th, 2012 |
Nazwa kodowa | Interlagos | Sandy Bridge-EP |
Generacja | Opteron | Xeon E5 |
Część | OS6276WKTGGGU | SR0L7 |
Obsługa pamięci | DDR3 | DDR3 Quad-channel |
Pamięć ECC | No | Yes |
PCI Express | Gen 2 | Gen 3 |
Liczba rdzeni | 16 | 4 |
---|---|---|
Liczba wątków | 16 | 8 |
SMP # CPUs | 4 | 2 |
Zintegrowana karta graficzna | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 10MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
8.0GT/s QPI | — | Yes |
---|---|---|
AES | Yes | — |
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |