Socket | AMD Socket G34 | Intel Socket 2011 |
---|---|---|
Strukturgröße | 32 nm | 32 nm |
Transistoren | 2,400 million | 1,270 million |
Chipgröße | 316 mm² | 294 mm² |
Package | — | FC-LGA10 |
Hersteller | — | Intel |
Taktfrequenz | 2.3 GHz | 3.3 GHz |
---|---|---|
Übertaktung | up to 3.2 GHz | up to 3.5 GHz |
Basis-Taktfrequenz | 200 MHz | 100 MHz |
Multiplikator | 11.5x | 33.0x |
Multiplikator entsperrt | No | No |
TDP | 115 W | 130 W |
Stromspannung | — | 1.35 V |
Typ | Server/Workstation | Server/Workstation |
---|---|---|
Produktionsstatus | End-of-life | unknown |
Veröffentlichungsdatum | Nov 14th, 2011 | Mar 6th, 2012 |
Codename | Interlagos | Sandy Bridge-EP |
Generation | Opteron | Xeon E5 |
Part# | OS6276WKTGGGU | SR0L7 |
Speicherunterstützung | DDR3 | DDR3 Quad-channel |
ECC-Speicher | No | Yes |
PCI Express | Gen 2 | Gen 3 |
Anzahl der Kerne | 16 | 4 |
---|---|---|
Anzahl der Threads | 16 | 8 |
SMP # CPUs | 4 | 2 |
Integrierter Grafikprozessor | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 10MB (shared) |
Anmerkungen | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
8.0GT/s QPI | — | Yes |
---|---|---|
AES | Yes | — |
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |