Socket | AMD Socket G34 | AMD Socket AM4 |
---|---|---|
Rozmiar procesu | 32 nm | 12 nm |
Tranzystory | 2,400 million | 4,940 million |
Rozmiar matrycy | 316 mm² | 210 mm² |
Pakiet | — | µOPGA-1331 |
Producent | — | GlobalFoundries |
tJMax | — | 95°C |
Częstotliwość | 2.3 GHz | 3.7 GHz |
---|---|---|
Zegar turbo | up to 3.2 GHz | up to 4.2 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 11.5x | 37.0x |
Mnożnik odblokowany | No | Yes |
TDP | 115 W | 65 W |
Rynek | Server/Workstation | Desktop |
---|---|---|
Status produkcji | End-of-life | Active |
Data wydania | Nov 14th, 2011 | Jul 7th, 2019 |
Nazwa kodowa | Interlagos | Picasso |
Generacja | Opteron | Ryzen 5 |
Część | OS6276WKTGGGU | YD3400C5M4MFH YD3400C5FHBOX |
Obsługa pamięci | DDR3 | DDR4-2933 MHz Dual-channel |
Pamięć ECC | No | No |
PCI Express | Gen 2 | Gen 3 |
Liczba rdzeni | 16 | 4 |
---|---|---|
Liczba wątków | 16 | 8 |
SMP # CPUs | 4 | 1 |
Zintegrowana karta graficzna | — | Radeon RX Vega 11 |
Cache L1 | 768K | 96K (per core) |
---|---|---|
Cache L2 | 16MB | 512K (per core) |
Cache L3 | 8MB (per die) | 4MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | Yes |
---|---|---|
AMD-V | Yes | Yes |
AMD64 | Yes | Yes |
AVX | Yes | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EVP | Yes | Yes |
F16C | — | Yes |
FMA3 | — | Yes |
FMA4 | Yes | — |
MMX | Yes | Yes |
Precision Boost | — | Yes |
SHA | — | Yes |
SMAP | — | Yes |
SMEP | — | Yes |
SMT | — | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | Yes |
SSE4.2 | Yes | Yes |
SSE4A | Yes | Yes |
SSSE3 | Yes | Yes |
XOP | Yes | — |