Presa | AMD Socket G34 | Intel Socket 1356 |
---|---|---|
Dimensione del processo | 32 nm | 32 nm |
Transistor | 2,400 million | 1,270 million |
Dimensione stampo | 316 mm² | 294 mm² |
Pacchetto | — | — |
Fonderia | — | Intel |
Frequenza | 2.6 GHz | 1900 MHz |
---|---|---|
Turbo clock | up to 3.3 GHz | up to 2.4 GHz |
Clock di base | 200 MHz | 100 MHz |
Moltiplicatore | 13.0x | 19.0x |
Moltiplicatore sbloccato | No | No |
TDP | 140 W | 95 W |
Voltaggio | — | 1.35 V |
Mercato | Server/Workstation | Server/Workstation |
---|---|---|
Stato di produzione | End-of-life | unknown |
Data di rilascio | Nov 14th, 2011 | May 14th, 2012 |
Nome in codice | Interlagos | Sandy Bridge-EN |
Generazione | Opteron | Xeon E5 |
Parte | OS6282YETGGGU | SR0LN |
Supporto memoria | DDR3 | DDR3 |
Memoria ECC | No | Yes |
PCI Express | Gen 2 | — |
Numero di core | 16 | 6 |
---|---|---|
Numero di threads | 16 | 12 |
SMP # CPUs | 4 | 2 |
Grafica integrata | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 15MB (shared) |
Note | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |