Socket | AMD Socket FS1r2 | AMD Socket FP6 |
---|---|---|
Tamaño del proceso | 32 nm | 7 nm |
Transistores | 1,178 million | 9,800 million |
Tamaño de Die | 246 mm² | 156 mm² |
Paquete | µPGA | FP6 |
Fabricante | — | TSMC |
tJMax | — | 105°C |
Frecuencia | 1900 MHz | 2.1 GHz |
---|---|---|
Frecuencia turbo | up to 2.8 GHz | up to 4 GHz |
Frecuencia de reloj base | 100 MHz | 100 MHz |
Multiplicador | 19.0x | 21.0x |
Multiplicador desbloqueado | No | No |
Voltaje | 1.3 V | — |
TDP | 35 W | 25 W |
Mercado | Mobile | Mobile |
---|---|---|
Estado de producción | unknown | Active |
Fecha de publicación | May 15th, 2012 | Jan 12th, 2021 |
Nombre Clave | Trinity | Lucienne |
Generación | A8 | Ryzen 5 |
Parte | AM4500DEC44HJ | 100-000000375 |
Soporte de memoria | unknown | DDR4-4266 MHz Dual-channel |
Memoria ECC | No | No |
PCI Express | — | Gen 3, 12 Lanes(CPU only) |
Número de núcleos | 4 | 6 |
---|---|---|
Número de hilos | 4 | 12 |
SMP # CPUs | 1 | 1 |
Gráficos integrados | Radeon HD 7640G | Radeon Graphics 448SP |
Caché L1 | 192K | 64K (per core) |
---|---|---|
Caché L2 | 4MB (shared) | 512K (per core) |
Caché L3 | — | 8MB (shared) |
Notas | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 497MHz integrated graphics base core frequency, 655MHz maximum dynamic core frequency | — |
---|
AES | Yes | Yes |
---|---|---|
AMD-V | Yes | Yes |
AMD64 | Yes | Yes |
AVX | Yes | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EVP | Yes | Yes |
F16C | Yes | Yes |
FMA3 | Yes | Yes |
FMA4 | Yes | — |
MMX | Yes | Yes |
Precision Boost 2 | — | Yes |
SHA | — | Yes |
SMAP | — | Yes |
SMEP | — | Yes |
SMT | — | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | Yes |
SSE4.2 | Yes | Yes |
SSE4A | Yes | Yes |
SSSE3 | Yes | Yes |
Turbo Core | Yes | — |
XOP | Yes | — |