AMD A8-4555M vs Intel Pentium G630
Physical Specifications
Socket | AMD Socket FP2 | Intel Socket 1155 |
---|---|---|
Process size | 32 nm | 32 nm |
Transistors | 1,178 million | 504 million |
Die size | 246 mm² | 131 mm² |
Package | µPGA | FC-LGA10 |
tCaseMax | 100°C | — |
Foundry | — | Intel |
Performance
Frequency | 1600 MHz | 2.7 GHz |
---|---|---|
Turbo clock | up to 2.4 GHz | — |
Base clock | 100 MHz | 100 MHz |
Multiplier | 16.0x | 27.0x |
Multiplier unlocked | No | No |
Voltage | 1.15 V | — |
TDP | 19 W | 65 W |
Architecture Details
Vertical Segment | Mobile | Desktop |
---|---|---|
Production status | unknown | End-of-life |
Release date | Sep 27th, 2012 | Sep 4th, 2011 |
Codename | Trinity | Sandy Bridge |
Generation | A8 | Pentium |
Part | AM4555SHE44HJ | SR05S |
Memory support | unknown Dual-channel | DDR3 Dual-channel |
ECC memory | No | No |
PCI Express | — | Gen 3, 16 Lanes(CPU only) |
Cores
Total Cores | 4 | 2 |
---|---|---|
Total Threads | 4 | 2 |
SMP # CPUs | 1 | 1 |
Integrated graphics | Radeon HD 7600G | Intel HD (Sandy Bridge) |
Cache
Cache L1 | 192K | 64K (per core) |
---|---|---|
Cache L2 | 4MB (shared) | 256K (per core) |
Cache L3 | — | 3MB (shared) |
Notes
Notes | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 497MHz integrated graphics base core frequency, 655MHz maximum dynamic core frequency | — |
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Features & Technologies
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
F16C | Yes | — |
FMA3 | Yes | — |
FMA4 | Yes | — |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
Turbo Core | Yes | — |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |