插座 | AMD Socket G34 | AMD Socket G34 |
---|---|---|
工艺尺寸 | 32 nm | 32 nm |
晶体管 | 2,400 million | 2,400 million |
模具尺寸 | 316 mm² | 316 mm² |
包 | — | — |
频率 | 2.3 GHz | 2.6 GHz |
---|---|---|
涡轮时钟 | up to 3.2 GHz | up to 3.3 GHz |
基本时钟 | 200 MHz | 200 MHz |
乘数 | 11.5x | 13.0x |
乘数解锁 | No | No |
TDP | 115 W | 140 W |
市场 | Server/Workstation | Server/Workstation |
---|---|---|
生产状况 | End-of-life | End-of-life |
发布日期 | Nov 14th, 2011 | Nov 14th, 2011 |
代码名称 | Interlagos | Interlagos |
代 | Opteron | Opteron |
部分 | OS6276WKTGGGU | OS6282YETGGGU |
内存支持 | DDR3 | DDR3 |
ECC内存 | No | No |
PCI Express | Gen 2 | Gen 2 |
核心数 | 16 | 16 |
---|---|---|
线程数 | 16 | 16 |
SMP # CPU | 4 | 4 |
集成显卡 | — | — |
缓存 L1 | 768K | 768K |
---|---|---|
缓存 L2 | 16MB | 16MB |
缓存 L3 | 8MB (per die) | 8MB (per die) |
笔记 | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. |
---|
AES | Yes | Yes |
---|---|---|
AMD-V | Yes | Yes |
AMD64 | Yes | Yes |
AVX | Yes | Yes |
CLMUL | Yes | Yes |
CVT16 | Yes | Yes |
EVP | Yes | Yes |
FMA4 | Yes | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | Yes |
SSE4.2 | Yes | Yes |
SSE4A | Yes | Yes |
SSSE3 | Yes | Yes |
XOP | Yes | Yes |