Socket | AMD Socket G34 | Intel BGA 1449 |
---|---|---|
Rozmiar procesu | 32 nm | 10 nm |
Tranzystory | 2,400 million | unknown |
Rozmiar matrycy | 316 mm² | unknown |
Pakiet | — | FC-BGA1449 |
Producent | — | Intel |
tCaseMax | — | 72°C |
tJMax | — | 100°C |
Częstotliwość | 2.3 GHz | 2000 MHz |
---|---|---|
Zegar turbo | up to 3.2 GHz | up to 3.7 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 11.5x | 20.0x |
Mnożnik odblokowany | No | No |
TDP | 115 W | 28 W |
Rynek | Server/Workstation | Mobile |
---|---|---|
Status produkcji | End-of-life | Active |
Data wydania | Nov 14th, 2011 | Sep 2nd, 2020 |
Nazwa kodowa | Interlagos | Tiger Lake-U |
Generacja | Opteron | Core i3 |
Część | OS6276WKTGGGU | unknown |
Obsługa pamięci | DDR3 | DDR4-3733 MHz Dual-channel |
Pamięć ECC | No | No |
PCI Express | Gen 2 | Gen 4, 16 Lanes(CPU only) |
Liczba rdzeni | 16 | 4 |
---|---|---|
Liczba wątków | 16 | 8 |
SMP # CPUs | 4 | 1 |
Zintegrowana karta graficzna | — | Iris Xe Graphics G4 |
Cache L1 | 768K | 96K (per core) |
---|---|---|
Cache L2 | 16MB | 1.25MB (per core) |
Cache L3 | 8MB (per die) | 8MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
AVX-512 | — | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
Boost 2.0 | — | Yes |
CLMUL | Yes | Yes |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
F16C | — | Yes |
FMA3 | — | Yes |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TSX | — | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |