Socket | AMD Socket AM3+ | Intel Socket 2011 |
---|---|---|
Rozmiar procesu | 32 nm | 32 nm |
Tranzystory | 1,200 million | 2,270 million |
Rozmiar matrycy | 315 mm² | 435 mm² |
Pakiet | µPGA | FC-LGA10 |
Producent | — | Intel |
Częstotliwość | 3.3 GHz | 1800 MHz |
---|---|---|
Zegar turbo | up to 4.3 GHz | up to 2.3 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 16.5x | 18.0x |
Mnożnik odblokowany | Yes | No |
Napięcie | 1.45 V | 1.35 V |
TDP | 95 W | 70 W |
Rynek | Desktop | Server/Workstation |
---|---|---|
Status produkcji | unknown | unknown |
Data wydania | Sep 2nd, 2014 | Mar 6th, 2012 |
Nazwa kodowa | Vishera | Sandy Bridge-EP |
Generacja | FX | Xeon E5 |
Część | FD837EWMW8KHKFD837EWMHKBOX | SR0HESR0LX |
Obsługa pamięci | DDR3 Dual-channel | DDR3 Quad-channel |
Pamięć ECC | No | Yes |
PCI Express | Gen 2 | Gen 3 |
Liczba rdzeni | 8 | 8 |
---|---|---|
Liczba wątków | 8 | 16 |
SMP # CPUs | 1 | 2 |
Zintegrowana karta graficzna | — | — |
Cache L1 | 384K | 64K (per core) |
---|---|---|
Cache L2 | 8MB | 256K (per core) |
Cache L3 | 8MB (shared) | 20MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped | C1 Stepping: SR0HE C2 Stepping: SR0LX |
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8.0GT/s QPI | — | Yes |
---|---|---|
AES | Yes | — |
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HT3.1 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
Turbo Core | Yes | — |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |