Socket | AMD Socket AM3+ | Intel Socket 1155 |
---|---|---|
Rozmiar procesu | 32 nm | 22 nm |
Tranzystory | 1,200 million | 1,400 million |
Rozmiar matrycy | 315 mm² | 160 mm² |
Pakiet | µPGA | FC-LGA12C |
Producent | — | Intel |
tCaseMax | — | 70°C |
Częstotliwość | 3.6 GHz | 2.3 GHz |
---|---|---|
Zegar turbo | up to 4.2 GHz | up to 3.3 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 18.0x | 23.0x |
Mnożnik odblokowany | Yes | No |
Napięcie | 1.425 V | — |
TDP | 95 W | 45 W |
Rynek | Desktop | Desktop |
---|---|---|
Status produkcji | unknown | unknown |
Data wydania | Oct 23rd, 2012 | Apr 29th, 2012 |
Nazwa kodowa | Zambezi | Ivy Bridge |
Generacja | FX | Core i5 |
Część | FD6120WMW6KGU | SR0P1 |
Obsługa pamięci | DDR3 Dual-channel | DDR3 Dual-channel |
Pamięć ECC | No | No |
PCI Express | Gen 2 | Gen 3, 16 Lanes(CPU only) |
Liczba rdzeni | 6 | 4 |
---|---|---|
Liczba wątków | 6 | 4 |
SMP # CPUs | 1 | 1 |
Zintegrowana karta graficzna | — | Intel HD 2500 |
Cache L1 | 288K | 64K (per core) |
---|---|---|
Cache L2 | 6MB | 256K (per core) |
Cache L3 | 8MB (shared) | 6MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped | Intel HD 2500 frequency: 650-1150MHz |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HT3.1 | Yes | — |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
Turbo Core | Yes | — |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |