Socket | AMD Socket AM3+ | Intel Socket 1155 |
---|---|---|
Rozmiar procesu | 32 nm | 32 nm |
Tranzystory | 1,200 million | 1,160 million |
Rozmiar matrycy | 315 mm² | 216 mm² |
Pakiet | µPGA | FC-LGA10 |
Producent | — | Intel |
Częstotliwość | 3.3 GHz | 3 GHz |
---|---|---|
Zegar turbo | up to 3.9 GHz | up to 3.3 GHz |
Zegar bazowy | 200 MHz | 100 MHz |
Mnożnik | 16.5x | 30.0x |
Mnożnik odblokowany | Yes | No |
Napięcie | 1.425 V | — |
TDP | 95 W | 95 W |
Rynek | Desktop | Desktop |
---|---|---|
Status produkcji | End-of-life | End-of-life |
Data wydania | Oct 12th, 2011 | Sep 4th, 2011 |
Nazwa kodowa | Zambezi | Sandy Bridge |
Generacja | FX | Core i5 |
Część | FD6100WMW6KGUFD6100WMGUSBX | SR02L |
Obsługa pamięci | DDR3 Dual-channel | DDR3 Dual-channel |
Pamięć ECC | No | No |
PCI Express | Gen 2 | Gen 3, 16 Lanes(CPU only) |
Liczba rdzeni | 6 | 4 |
---|---|---|
Liczba wątków | 6 | 4 |
SMP # CPUs | 1 | 1 |
Zintegrowana karta graficzna | — | Intel HD 2000 |
Cache L1 | 288K | 64K (per core) |
---|---|---|
Cache L2 | 6MB | 256K (per core) |
Cache L3 | 8MB (shared) | 6MB (shared) |
Uwagi | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HT3.1 | Yes | — |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
Turbo Core | Yes | — |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |