Socket | AMD Socket G34 | Intel Socket 1200 |
---|---|---|
Taille du processus | 32 nm | 14 nm |
Transistors | 2,400 million | unknown |
Taille des matrices | 316 mm² | unknown |
Package | — | FC-LGA1200 |
Fonderie | — | Intel |
tCaseMax | — | 72°C |
tJMax | — | 100°C |
Fréquence | 2.3 GHz | 3.7 GHz |
---|---|---|
Turbo clock | up to 3.2 GHz | up to 4.4 GHz |
Base clock | 200 MHz | 100 MHz |
Multiplicateur | 11.5x | 37.0x |
Multiplicateur débloqué | No | No |
TDP | 115 W | 65 W |
Marché | Server/Workstation | Desktop |
---|---|---|
État de la production | End-of-life | Active |
Date de sortie | Nov 14th, 2011 | Mar 16th, 2021 |
Nom de code | Interlagos | Comet Lake-R |
Génération | Opteron | Core i3 |
Part | OS6276WKTGGGU | unknown |
Support mémoire | DDR3 | DDR4-2666 MHz Dual-channel |
La mémoire du CEC | No | No |
PCI Express | Gen 2 | Gen 3, 16 Lanes(CPU only) |
Nombre de cœurs | 16 | 4 |
---|---|---|
Nombre de threads | 16 | 8 |
SMP # CPUs | 4 | 1 |
Cartes graphiques intégrées | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 6MB (shared) |
Remarques | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
ABM | — | Yes |
---|---|---|
ADX | — | Yes |
AES | Yes | — |
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
AVX2 | — | Yes |
BMI1 | — | Yes |
BMI2 | — | Yes |
CLMUL | Yes | Yes |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
F16C | — | Yes |
FMA3 | — | Yes |
FMA4 | Yes | — |
Intel 64 | — | Yes |
MMX | Yes | Yes |
RdRand | — | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TBT 2.0 | — | Yes |
TSX | — | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |