Socket | AMD Socket AM3+ | Intel Socket 1155 |
---|---|---|
Taille du processus | 32 nm | 32 nm |
Transistors | 1,200 million | 1,160 million |
Taille des matrices | 315 mm² | 216 mm² |
Package | µPGA | FC-LGA10 |
Fonderie | — | Intel |
tCaseMax | — | 73°C |
Fréquence | 3.3 GHz | 2.9 GHz |
---|---|---|
Turbo clock | up to 3.9 GHz | up to 3.2 GHz |
Base clock | 200 MHz | 100 MHz |
Multiplicateur | 16.5x | 29.0x |
Multiplicateur débloqué | Yes | No |
Tension | 1.425 V | 1.176 V |
TDP | 95 W | 95 W |
Marché | Desktop | Desktop |
---|---|---|
État de la production | End-of-life | End-of-life |
Date de sortie | Oct 12th, 2011 | May 22nd, 2011 |
Nom de code | Zambezi | Sandy Bridge |
Génération | FX | Core i5 |
Part | FD6100WMW6KGUFD6100WMGUSBX | SR02K |
Support mémoire | DDR3 Dual-channel | DDR3 Dual-channel |
La mémoire du CEC | No | No |
PCI Express | Gen 2 | Gen 3, 16 Lanes(CPU only) |
Nombre de cœurs | 6 | 4 |
---|---|---|
Nombre de threads | 6 | 4 |
SMP # CPUs | 1 | 1 |
Cartes graphiques intégrées | — | Intel HD 2000 |
Cache L1 | 288K | 64K (per core) |
---|---|---|
Cache L2 | 6MB | 256K (per core) |
Cache L3 | 8MB (shared) | 6MB (shared) |
Remarques | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). This processor comes with an unlocked multiplier, allowing users to set the multiplier value higher than the shipped | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HT3.1 | Yes | — |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
Turbo Core | Yes | — |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |