AMD Athlon XP 1700+ vs AMD EPYC 7251
Physical Specifications
| Socket | AMD Socket A | AMD Socket SP3 |
|---|---|---|
| Process size | 180 nm | 14 nm |
| Transistors | 37 million | 4,800 million |
| Die size | 150 mm² | 213 mm² |
| Package | µPGA | FCLGA-4094 |
| Foundry | — | GlobalFoundries |
| tCaseMax | — | 81°C |
Performance
| Frequency | 1467 MHz | 2.1 GHz |
|---|---|---|
| Turbo clock | — | up to 2.9 GHz |
| Base clock | 133 MHz | 100 MHz |
| Multiplier | 11.0x | 21.0x |
| Multiplier unlocked | No | Yes |
| Voltage | 1.75 V | — |
| TDP | 64 W | 120 W |
Architecture Details
| Vertical Segment | Desktop | Server/Workstation |
|---|---|---|
| Production status | End-of-life | Active |
| Release date | Oct 9th, 2001 | Jun 29th, 2017 |
| Codename | Palomino | Naples |
| Generation | Athlon XP | EPYC |
| Part | AX1700DMT3C | PS7251BFV8SAFPS7251BFAFWOF |
| Memory support | unknown | DDR4-2400 MHz Eight-channel |
| ECC memory | No | Yes |
| PCI Express | — | Gen 3 |
Cores
| Total Cores | 1 | 8 |
|---|---|---|
| Total Threads | 1 | 16 |
| SMP # CPUs | 1 | 2 |
| Integrated graphics | — | — |
Cache
| Cache L1 | 128K | 96K (per core) |
|---|---|---|
| Cache L2 | 256K | 512K (per core) |
| Cache L3 | — | 32MB (shared) |
Features & Technologies
| 3DNow! | Yes | — |
|---|---|---|
| ABM | — | Yes |
| ADX | — | Yes |
| AES | — | Yes |
| AMD-V | — | Yes |
| AMD-Vi | — | Yes |
| AVX | — | Yes |
| AVX2 | — | Yes |
| BMI1 | — | Yes |
| BMI2 | — | Yes |
| CLMUL | — | Yes |
| EMMX | — | Yes |
| F16C | — | Yes |
| FMA3 | — | Yes |
| FPU | — | Yes |
| MMX | Yes | Yes |
| NX bit | — | Yes |
| Protected | — | Yes |
| RdRand | — | Yes |
| Real | — | Yes |
| SEV | — | Yes |
| SHA | — | Yes |
| SME | — | Yes |
| SMM | — | Yes |
| SMT | — | Yes |
| SSE | Yes | Yes |
| SSE2 | — | Yes |
| SSE3 | — | Yes |
| SSE4.1 | — | Yes |
| SSE4.2 | — | Yes |
| SSE4A | — | Yes |
| SSSE3 | — | Yes |
| SenseMi | — | Yes |
| TSME | — | Yes |
Notes
| Notes | — | This processor comes with an unlocked base clock multiplier, allowing users to set the multiplier value higher than shipped value, to facilitate better overclocking. |
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