Socket | AMD Socket G34 | Intel Socket 1356 |
---|---|---|
Taille du processus | 32 nm | 22 nm |
Transistors | 2,400 million | 1,400 million |
Taille des matrices | 316 mm² | 160 mm² |
Package | — | — |
Fonderie | — | Intel |
Fréquence | 2.3 GHz | 2.2 GHz |
---|---|---|
Turbo clock | up to 3.2 GHz | — |
Base clock | 200 MHz | 100 MHz |
Multiplicateur | 11.5x | 22.0x |
Multiplicateur débloqué | No | No |
TDP | 115 W | 80 W |
Marché | Server/Workstation | Server/Workstation |
---|---|---|
État de la production | End-of-life | unknown |
Date de sortie | Nov 14th, 2011 | Sep 1st, 2013 |
Nom de code | Interlagos | Ivy Bridge-EN |
Génération | Opteron | Xeon E5 |
Part | OS6276WKTGGGU | SR1AJ |
Support mémoire | DDR3 | DDR3 |
La mémoire du CEC | No | Yes |
PCI Express | Gen 2 | — |
Nombre de cœurs | 16 | 6 |
---|---|---|
Nombre de threads | 16 | 12 |
SMP # CPUs | 4 | 2 |
Cartes graphiques intégrées | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 15MB (shared) |
Remarques | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
ECC | — | Yes |
EIST | — | Yes |
EPT | — | Yes |
EVP | Yes | — |
F16C | — | Yes |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |