Socket | AMD Socket G34 | Intel Socket 1155 |
---|---|---|
Process size | 32 nm | 32 nm |
Transistors | 2,400 million | 1,160 million |
Die size | 316 mm² | 216 mm² |
Package | — | FC-LGA10 |
Foundry | — | Intel |
Frequency | 2.3 GHz | 3.6 GHz |
---|---|---|
Turbo clock | up to 3.2 GHz | up to 4 GHz |
Base clock | 200 MHz | 100 MHz |
Multiplier | 11.5x | 36.0x |
Multiplier unlocked | No | No |
TDP | 115 W | 95 W |
Vertical Segment | Server/Workstation | Server/Workstation |
---|---|---|
Production status | End-of-life | End-of-life |
Release date | Nov 14th, 2011 | May 29th, 2011 |
Codename | Interlagos | Sandy Bridge |
Generation | Opteron | Xeon E3 |
Part | OS6276WKTGGGU | SR055 |
Memory support | DDR3 | DDR3 Dual-channel |
ECC memory | No | Yes |
PCI Express | Gen 2 | Gen 3, 16 Lanes(CPU only) |
Total Cores | 16 | 4 |
---|---|---|
Total Threads | 16 | 8 |
SMP # CPUs | 4 | 1 |
Integrated graphics | — | — |
Cache L1 | 768K | 64K (per core) |
---|---|---|
Cache L2 | 16MB | 256K (per core) |
Cache L3 | 8MB (per die) | 8MB (shared) |
Notes | 16KB L1 data cache per core. 64KB L1 instruction cache shared per two cores (per module). 2MB L2 cache shared per two cores (per module). 8MB L3 cache shared per eight cores (per die). 14MB total L3 cache available when using HT Assist. | — |
---|
AES | Yes | — |
---|---|---|
AES-NI | — | Yes |
AMD-V | Yes | — |
AMD64 | Yes | — |
AVX | Yes | Yes |
CLMUL | Yes | — |
CVT16 | Yes | — |
EIST | — | Yes |
EVP | Yes | — |
FMA4 | Yes | — |
HTT | — | Yes |
Intel 64 | — | Yes |
MMX | Yes | Yes |
SSE | Yes | Yes |
SSE2 | Yes | Yes |
SSE3 | Yes | Yes |
SSE4.1 | Yes | — |
SSE4.2 | Yes | Yes |
SSE4A | Yes | — |
SSSE3 | Yes | Yes |
TXT | — | Yes |
VT-d | — | Yes |
VT-x | — | Yes |
XD bit | — | Yes |
XOP | Yes | — |